This invention relates to integrated circuit packages; and more particularly, it relates to multichip packages which have a small footprint and provide thermal paths for cooling both high-power and low-power integrated circuits.
Initially in the prior art, integrated circuit chips were packaged separately. Such single-chip packages encapsulated a chip to protect it from contamination, and to provide input-output terminals by which the chip could be soldered into a printed circuit board. Typically, the packages were made of plastic or ceramic.
Subsequently, multichip integrated packages were developed which encapsulated several chips. One attractive feature of multichip packages is that they provide low capacitance interconnections between the chips within the package, and thus the delay of inter chip signal propagation is reduced. Usually, the number of chips which are encapsulated in a multichip package is between two and twenty.
A problem, however, which is aggravated by multichip packages is how to keep the package from overheating. This is because all of the chips in a package dissipate power which cause the package to heat up. To resolve such a heat-dissipation problem, it is very desirable to not compromise the size of the package's footprint. A package's footprint is the area which it occupies on a printed circuit board, and it should be kept as small as possible so that more packages can be placed on the board.
In the prior art, a cavity-down multichip package was often used whenever some of the chips to be packaged had a high power dissipation. Such a package is comprised of a thin body having top and bottom major surfaces; chips are held in downward-facing cavities which extend from the bottom surface into the body; and input/output pins are disposed in rows on the periphery of the bottom surface around the cavities. This package will cool the high power dissipating chips because it provides a small thermal resistance path from the downward-facing cavity to the top surface.
However, it has been determined by the present inventor that the cavity-down package is very inadequate for handling the frequent situation where some but not all of the chips have a high power dissipation. Specifically, in such a case, the present inventor has found that the footprint of the package can be reduced by over 100% without compromising the cooling for the high power chips.
Accordingly, a primary object of the invention is to provide a novel small footprint multichip package for holding both high power and low power chips.